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C/C++ Source or Header  |  2000-09-05  |  14.8 KB  |  282 lines

  1. /*
  2. **      $VER: resources/ioblix.h 37.3 (7.4.99)
  3. **
  4. **      (C) Copyright 1998,1999 Thore Böckelmann
  5. **      All Rights Reserved.
  6. */
  7.  
  8. #ifndef RESOURCES_IOBLIX_H
  9. #define RESOURCES_IOBLIX_H 1
  10.  
  11. #ifndef EXEC_TYPES_H
  12. #include <exec/types.h>
  13. #endif
  14.  
  15. #ifndef EXEC_NODES_H
  16. #include <exec/nodes.h>
  17. #endif
  18.  
  19. #ifndef EXEC_LISTS_H
  20. #include <exec/lists.h>
  21. #endif
  22.  
  23. #ifndef EXEC_LIBRARIES_H
  24. #include <exec/libraries.h>
  25. #endif
  26.  
  27. #ifndef EXEC_SEMAPHORES_H
  28. #include <exec/semaphores.h>
  29. #endif
  30.  
  31. #ifndef EXEC_INTERRUPTS_H
  32. #include <exec/interrupts.h>
  33. #endif
  34.  
  35. #ifndef PREFS_SERIAL_H
  36. #include <prefs/serial.h>
  37. #endif
  38.  
  39. #define IOBLIXRESNAME               "ioblix.resource"
  40.  
  41. /* manufacturer and product IDs for RBM products */
  42. #define RBM_MANUF_ID                4711    /* manufacturer ID of RBM Digitaltechnik    */
  43. #define IOBLIX_Z2_PROD_ID           1       /* board ID of ZorroII IOBlix board         */
  44. #define IOBLIX_1200_SER_PROD_ID     2       /* board ID of IOBlix1200 ser module        */
  45. #define IOBLIX_1200_PAR_PROD_ID     3       /* board ID of IOBlix1200 par module        */
  46.  
  47. /* how many boards can exist */
  48. #define IOBLIX_MAX_Z2_BOARDS        5
  49. #define IOBLIX_MAX_CP_BOARDS        1
  50.  
  51. /* how many units of which type can exist */
  52. #define IOBLIX_Z2_NUM_SERUNITS      4       /* max. serial ports on Z2 board            */
  53. #define IOBLIX_Z2_NUM_PARUNITS      2       /* max. parallel ports on Z2 board          */
  54. #define IOBLIX_Z2_NUM_FIFOUNITS     1       /* max. ext. fifos on Z2 board              */
  55. #define IOBLIX_Z2_NUM_ETHERNETUNITS 1       /* max. Ethernet modules on Z2 board        */
  56. #define IOBLIX_Z2_NUM_AUDIOUNITS    1       /* max. Audio modules on Z2 board           */
  57.  
  58. #define IOBLIX_CP_NUM_SERUNITS      4       /* max. ser ports on clock port board       */
  59. #define IOBLIX_CP_NUM_PARUNITS      4       /* max. par ports on clock port board       */
  60. #define IOBLIX_CP_NUM_FIFOUNITS     0       /* max. fifos on clock port board           */
  61. #define IOBLIX_CP_NUM_ETHERNETUNITS 0       /* max. Ethernets on clock port board       */
  62. #define IOBLIX_CP_NUM_AUDIOUNITS    0       /* max. Audio modules on clock port board   */
  63.  
  64. /* the central resource */
  65. struct IOBlixResource {
  66.     struct Library ir_Library;
  67.     struct ExecBase *ir_SysBase;
  68.     /* private data follows, hands off! */
  69. };
  70.  
  71. struct IOBlixBoardNode {
  72.     struct Node ibn_Node;                   /* link                                     */
  73.     struct ConfigDev *ibn_Board;            /* ConigDev structure as returned by        */
  74.                                             /* expansion/FindConfigDev()                */
  75.     UWORD ibn_Type;                         /* Z2, clock port, etc                      */
  76.     UWORD ibn_Number;                       /* internal board number                    */
  77.     /* new for V37.11 */
  78.     UWORD ibn_FirmwareVersion;              /* the board's ISP firmware version         */
  79.                                             /* only valid for Z2 boards                 */
  80. };
  81.  
  82. /* IOBlixBoardNode.ibn_Type */
  83. #define IBT_ZORRO2                  1       /* ZorroII board                            */
  84. #define IBT_CP_SERIAL               2       /* clock port serial module                 */
  85. #define IBT_CP_PARALLEL             3       /* clock port parallel module               */
  86.  
  87. /* common structure for chip's register addresses */
  88. struct ChipRegs {
  89.     ULONG cr_RegCount;                      /* number of register addresses following   */
  90.     APTR cr_Regs[1];                        /* dummy array of register addresses        */
  91.                                             /* cr_RegCount pointers follow              */
  92. };
  93.  
  94. struct IOBlixPnPInfo {
  95.     UBYTE pnp_SerialIdentifier[32];         /* serial identifiert read during PnP       */
  96.     UBYTE pnp_DeviceIdent[8];
  97.     ULONG pnp_DeviceSerNo;
  98.     APTR pnp_AddressAddr;                   /* address register address                 */
  99.     APTR pnp_WriteAddr;                     /* write register address                   */
  100.     APTR pnp_ReadAddr;                      /* read register address                    */
  101.     ULONG pnp_CardSelectNumber;             /* PnP device number (CSN)                  */
  102.     ULONG pnp_LogicalDeviceNumber;          /* logical device number of this chip       */
  103.     APTR pnp_Reserved[4];
  104. };
  105.  
  106. /* IOBlixChipNode, returned by FindChip() and ObtainChip */
  107. /* all fields are READ-ONLY! */
  108. struct IOBlixChipNode {
  109.     struct Node icn_Node;                   /* link                                     */
  110.     ULONG  icn_Flags;                       /* flags                                    */
  111.     UWORD  icn_Type;                        /* chip type (ser, par, etc)                */
  112.     UWORD  icn_Number;                      /* chip's internal number                   */
  113.                                             /* equals unit number of devices            */
  114.     struct ChipRegs *icn_ChipRegisters;     /* array of pointers to chips registers     */
  115.                                             /* ie a pointer to (struct UARTRegisters *) */
  116.                                             /* the old icn_Address entry is obsolete    */
  117.     UBYTE  icn_Description[256];            /* name, information, etc                   */
  118.     UBYTE *icn_Owner;                       /* current owner name, or NULL if none      */
  119.     struct IOBlixBoardNode *icn_Board;      /* board to which the chip belongs to       */
  120.     LONG   icn_ExpanderPort;                /* cp port, if used with cp expander        */
  121.                                             /* -1 for Z2 boards                         */
  122.                                             /* 0..3 for clockport modules               */
  123.     struct SignalSemaphore icn_SharedAccessSema;
  124.                                             /* semaphore for shared chip access         */
  125.                                             /* you MUST obtain this if you want to      */
  126.                                             /* access the chip in shared mode to avoid  */
  127.                                             /* crashes                                  */
  128.     struct List icn_SharedAccessorList;     /* list of shared accessors                 */
  129.     ULONG  icn_SharedAccessorCount;         /* counter for shared accesses              */
  130.     union {
  131.         struct SerialChipProperties {
  132.             ULONG scp_UARTType;             /* serial UART type                         */
  133.             ULONG scp_FIFOSize;             /* UART's fifo size                         */
  134.             ULONG scp_Flags;                /* flags                                    */
  135.             ULONG scp_Frequency;            /* oscillator frequency                     */
  136.             struct SerialPrefs scp_Prefs;   /* baud, handshake, etc                     */
  137.         } icn_SerialProperties;
  138.         struct ParallelChipProperties {
  139.             ULONG pcp_Abilities;            /* parport ability mask                     */
  140.             ULONG pcp_FIFOSize;             /* parallel fifo size                       */
  141.             ULONG pcp_WriteThresh;          /* irq threshold on write                   */
  142.             ULONG pcp_ReadThresh;           /* irq threshold on read                    */
  143.         } icn_ParallelProperties;
  144.         struct ExternalFIFOProperties {
  145.             BOOL efp_Installed;
  146.             BOOL efp_Operable;
  147.             ULONG efp_WriteFIFOSize;
  148.             ULONG efp_WriteHalfFullSize;
  149.             ULONG efp_ReadFIFOSize;
  150.             ULONG efp_ReadHalfFullSize;
  151.         } icn_ExternalFIFOProperties;
  152.         struct EthernetChipProperties {
  153.             ULONG ecp_ChipType;
  154.             ULONG ecp_MBitPerSecond;
  155.             UBYTE ecp_MACAddress[8]; // should be SANA2_MAX_ADDR_BYTES, but this way I avoid to include "devices/sana2.h"
  156.         } icn_EthernetChipProperties;
  157.         struct AudioChipProperties {
  158.             struct IOBlixPnPInfo acp_PnPInfo;
  159.         } icn_AudioChipProperties;
  160.     } icn_Properties;
  161. };
  162.  
  163. #define icns_UARTType               icn_Properties.icn_SerialProperties.scp_UARTType
  164. #define icns_FIFOSize               icn_Properties.icn_SerialProperties.scp_FIFOSize
  165. #define icns_Flags                  icn_Properties.icn_SerialProperties.scp_Flags
  166. #define icns_Frequency              icn_Properties.icn_SerialProperties.scp_Frequency
  167. #define icns_Prefs                  icn_Properties.icn_SerialProperties.scp_Prefs
  168. #define icnp_Abilities              icn_Properties.icn_ParallelProperties.pcp_Abilities
  169. #define icnp_FIFOSize               icn_Properties.icn_ParallelProperties.pcp_FIFOSize
  170. #define icnp_WriteThresh            icn_Properties.icn_ParallelProperties.pcp_WriteThresh
  171. #define icnp_ReadThresh             icn_Properties.icn_ParallelProperties.pcp_ReadThresh
  172. #define icnf_StatusReg              icn_Properties.icn_ExternalFIFOProperties.efp_StatusReg
  173. #define icnf_Installed              icn_Properties.icn_ExternalFIFOProperties.efp_Installed
  174. #define icnf_Operable               icn_Properties.icn_ExternalFIFOProperties.efp_Operable
  175. #define icnf_WriteFIFOSize          icn_Properties.icn_ExternalFIFOProperties.efp_WriteFIFOSize
  176. #define icnf_WriteHalfFullSize      icn_Properties.icn_ExternalFIFOProperties.efp_WriteHalfFullSize
  177. #define icnf_ReadFIFOSize           icn_Properties.icn_ExternalFIFOProperties.efp_ReadFIFOSize
  178. #define icnf_ReadHalfFullSize       icn_Properties.icn_ExternalFIFOProperties.efp_ReadHalfFullSize
  179. #define icne_ChipType               icn_Properties.icn_EthernetChipProperties.ecp_ChipType
  180. #define icne_MBitPerSecond          icn_Properties.icn_EthernetChipProperties.ecp_MBitPerSecond
  181. #define icne_MACAddress             icn_Properties.icn_EthernetChipProperties.ecp_MACAddress
  182. #define icna_PnPInfo                icn_Properties.icn_AudioChipProperties.acp_PnPInfo
  183.  
  184. /* icn_Flags */
  185. #define ICFB_SHARED                 0       /* chip is obtained in shared mode          */
  186. #define ICFF_SHARED                 (1 << ICFB_SHARED)
  187.  
  188. /* icn_Type */
  189. #define ICT_NO_CHIP                 0       /* just a dummy                             */
  190. #define ICT_Z2_SERIAL_CHIP          1       /* UART on a ZorroII board                  */
  191. #define ICT_Z2_PARALLEL_CHIP        2       /* ParPort on a ZorroII board               */
  192. #define ICT_Z2_EXTFIFO_CHIP         3       /* FIFO on a ZorroII board                  */
  193. #define ICT_Z2_ETHERNET_CHIP        4       /* Ethernet chip on a ZorroII board         */
  194. #define ICT_Z2_AUDIO_SBPRO_CHIP     5       /* SoundBlaster                             */
  195. #define ICT_Z2_AUDIO_ADLIB_CHIP     6       /* AdLib                                    */
  196. #define ICT_Z2_AUDIO_SSD_CHIP       7       /* SoundSystemDirect                        */
  197. #define ICT_Z2_AUDIO_MIDI_CHIP      8       /* MIDI                                     */
  198. #define ICT_Z2_AUDIO_GAMEPORT_CHIP  9       /* GamePort                                 */
  199. #define ICT_CP_SERIAL_CHIP          101     /* UART on a clock port module              */
  200. #define ICT_CP_PARALLEL_CHIP        102     /* ParPort on a clock port module           */
  201.  
  202. /* scp_UARTType */
  203. #define SCPT_UNKNOWN                0       /* unknown UART                             */
  204. #define SCPT_8250                   1       /* CIA 8250                                 */
  205. #define SCPT_16450                  2       /* 16C450                                   */
  206. #define SCPT_16550                  3       /* 16C550                                   */
  207. #define SCPT_16550A                 4       /* 16C550A                                  */
  208. #define SCPT_CIRRUS                 5       /* Cirrus                                   */
  209. #define SCPT_16650                  6       /* 16C650                                   */
  210. #define SCPT_16650V2                7       /* 16C650 V2                                */
  211. #define SCPT_16654                  8       /* 16C654                                   */
  212. #define SCPT_16750                  9       /* 16C750                                   */
  213. #define SCPT_STARTECH               10      /* StarTech                                 */
  214. #define SCPT_MAX                    10
  215.  
  216. /* scp_Flags */
  217. #define SCPFB_USE_FIFO              0       /* enable FIFO                              */
  218. #define SCPFF_USE_FIFO              (1 << SCPFB_USE_FIFO)
  219. #define SCPFB_CLEAR_FIFO            1       /* clear FIFO on use                        */
  220. #define SCPFF_CLEAR_FIFO            (1 << SCPFB_CLEAR_FIFO)
  221. #define SCPFB_STARTECH              2       /* enable StarTech features                 */
  222. #define SCPFF_STARTECH              (1 << SCPFB_STARTECH)
  223.  
  224. /* pcp_Abilities */
  225. /* simple parallel port */
  226. #define PCPAB_SPP                   0
  227. #define PCPAF_SPP                   (1 << PCPAB_SPP)
  228. /* parallel port with fifo */
  229. #define PCPAB_PPF                   1
  230. #define PCPAF_PPF                   (1 << PCPAB_PPF)
  231. /* PS/2 mode supported */
  232. #define PCPAB_PS2                   2
  233. #define PCPAF_PS2                   (1 << PCPAB_PS2)
  234. /* EPP mode supported */
  235. #define PCPAB_EPP                   3
  236. #define PCPAF_EPP                   (1 << PCPAB_EPP)
  237. /* ECP mode supported */
  238. #define PCPAB_ECP                   4
  239. #define PCPAF_ECP                   (1 << PCPAB_ECP)
  240. /* ECR register available */
  241. #define PCPAB_ECR                   5
  242. #define PCPAF_ECR                   (1 << PCPAB_ECR)
  243. /* ECP/PS2 mode supported */
  244. #define PCPAB_ECP_PS2               6
  245. #define PCPAF_ECP_PS2               (1 << PCPAB_ECP_PS2)
  246. /* ECP/EPP mode supported */
  247. #define PCPAB_ECP_EPP               7
  248. #define PCPAF_ECP_EPP               (1 << PCPAB_ECP_EPP)
  249. /* IEEE1284 compatible */
  250. #define PCPAB_IEEE1284              8
  251. #define PCPAF_IEEE1284              (1 << PCPAB_IEEE1284)
  252. /* port is completely dead */
  253. #define PCPAB_NOT_WORKING           31
  254. #define PCPAF_NOT_WORKING           (1 << PCPAB_NOT_WORKING)
  255.  
  256. /* ecp_Flags */
  257. /* unknown Ethernet chip */
  258. #define ECPT_UNKNOWN                0
  259. /* SMC 91C92 */
  260. #define ECPT_SMC91C92               1
  261. /* SMC 91C94 */
  262. #define ECPT_SMC91C94               2
  263.  
  264. /* Interrupt Hooks                                                                      */
  265. /* To be able to recognize all interrupts, that can happen on an IOBlix board, it is    */
  266. /* necessary to hook into IOBlix' own interrupt chain. Your node will be enqueued       */
  267. /* and called dependant of its priority.                                                */
  268. /* This structure must be filled with all necessary data to be called within an         */
  269. /* interrupt.                                                                           */
  270. /* Especially ihn_Node.ln_Pri should be initialized with a suitable value               */
  271.  
  272. struct IRQHookNode {
  273.     struct Node ihn_Node;                   /*                                          */
  274.     ULONG (*ihn_HookFunc)( APTR userData ); /* the function, that is to be called when  */
  275.                                             /* an interrupt occurs                      */
  276.     APTR ihn_HookUserData;                  /* any data you want to be passed to your   */
  277.                                             /* function. Data is passed on the stack!   */
  278. };
  279.  
  280. #endif /* RESOURCES_IOBLIX_H */
  281.  
  282.